1. Engineering
  2. Electrical Engineering
  3. i want to ask 66...

Question: i want to ask 66...

Question details

b) Draw a block diagram using Lwool s register. Design a four-bit shift register (not a universal shift register) with parallel load using D flip- flops. (See Figs. 6.2 and 6.3.) There are two control inputs: shift and load. When shift 1, the content of the register is shifted toward As by one position. New data are transferred into the register when load 1 and shift - 0. If both control inputs are equal to 0, the content of the register does not change. (HDL-see Problem 6.35(c), (d)) 6,6 Draw the logic diagram of a four-bit register with four D flip-flops and four 4 X 1 mul tiplexers with mode selection inputs s and so. The register operates according to the fol- 6.7 see Proble m 6 35(

6.35 Write and verify: (a) A structural HDL model for the register described in Problem 6.2. (b)* A behavioral HDL model for the register described in Problem 6.2. (c) A structural HDL model for the register described in Problem 6.6.

Problems 389 (d) A behavioral HDL model for the register described in Problem 6.6. e) A structural HDL model for the register described in Problem 6.7 ()) A behavioral HDL model for the register described in Problem 6.7. (g) A behavioral HDL model of the binary counter described in Fig. 6.8. (h) A behavioral HDL model of the serial subtractor described in Problem 6.9(a). (i) A behavioral HDL model of the serial subtractor described in Problem 6.9(b). A behavioral HDL model of the serial 2s complementer described in Problem 6 (k) A behavioral HDL model of the BCD ripple counter described in Problem 6.13, (I) A behavioral HDL model of the up-down counter described in Problem 6.18. Write and verify the HDI, behavioral and structural descrintione of tha four hit

I want to ask 6.6.

Solution by an expert tutor
Blurred Solution
This question has been solved
Subscribe to see this solution