1. Engineering
  2. Electrical Engineering
  3. in the following circuit all mosfets are biased in saturation...

Question: in the following circuit all mosfets are biased in saturation...

Question details

i. Differential Pair with MOS Cascoding (25) In the following circuit, a MosFETs are biased in saturation mode by their respective VG and DC current Ibias 400 KLA. The N-Mos transistors have a shallow overdrive voltage of Vor 0.2 V and Early voltage V 6 V: The P-Mos have OV p 0.3 v and Early voltage A p 9 v. The Vo V threshold voltage of the NMOS V 0.5 V. The technological parameter kn 100 HANV and k 50 MAN2. The current source needs a minimum voltage of 2 v to maintain the driving voltage and its impedance can be neglected. A differential signal voltage v 0.1 sin(2000nt) (V) is applied to the gate of Q1 and Q2. If the channel length of all the MosFETs is 0.5 Hm, design the channel width for Q1. 2) Whats the minimum common-mode input voltage of the circuit? 3) Use appropriate ac model of the M derive the output resistance Row from the network formed by Q2 and Q4, as shown in the circuit 4) Use the result from 3), determine the intrinsic gain of the circuit 5) If a load R 40 ko is connected, calculate the ac component of vo. VDO Voe. 24 Nov Vas RL Vo Nov G4 G3 NAN Yo VA PL G1

Solution by an expert tutor
Blurred Solution
This question has been solved
Subscribe to see this solution