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Pipeline ProcessorPIPELINED PROCESSOR PROBLEM For a matrix addition involving two 100 by 100 matrices, find T1 and Tpl assuming a pipeline of length K. Show, through a reasonable choice for K, that the speedup of the pipelined processor is approximately equal to K. Also, find the efficiency of the 1) no pipeline stalls ( flushes) 2) 200 pipeline stalls ( flushes) Hint: A reasonable choice for a pipeline units assuming integer operands may include the following: 1) instruction fetch unit 2) instruction decode unit 3) operand fetch unit 4) instruction execution unit (addition) 5) write back unit Hence using a pipeline length of 5 is acceptable for this problem.

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