# Question: the goal in this part is to choose input and...

###### Question details

The goal in this part is to choose input and output activation-levels to minimize the total number gates and chips used in the overall design of these two circuits. Choose only one of the two possible activation-levels for each of the inputs, i.e., A(H), B(L), etc. [but not A(H) for one and A(L) for the other]. (If you need both A(H) and A(L), that will cost one gate, a level-shifter or its equivalent) Do not simplify. (Hint: No more than two chips are needed. (IC's) ) ** / means negation ** Y = /[ (A * /B) + /(C + /D) ] Z = [ (A + /B) * /(C * D) ]