Question: the intel 8086 microprocessor requires four clock cycles for a...
The Intel 8086 microprocessor requires four clock cycles for a bus read operation. The valid data is on the bus for an amount that extends in to the fourth processor clock cycle. Assume a processor clock rate of 4 MHz.
a. What is the maximum data transfer rate?
b. Repeat but assume the need to insert one wait state per byte transferred.